The present invention relates to a luminance resolution enhancement circuit and display apparatus that employ dithering to improve the luminance resolution of an image displayed on a display device such as a plasma display panel (PDP) or digital micromirror device (DMD).
In a plasma display panel, for example, each light-emitting picture element or pixel has only an on-state and an off-state. To express shades of gray and other colors, as required for displaying video signals, each field of the video signal is divided into subfields, so that the pixels can be switched on and off more often than once per field. FIG. 1 shows an example in which a field (AF) is divided into eight subfields (SF0 to SF7), each comprising an addressing interval (AD) and a continuous firing or sustaining period (CF). During each addressing interval, one bit of data is written to every pixel on the display panel. Light emission takes place most intensely during the sustaining periods, because the phosphor coatings of the pixels are not excited during the addressing intervals and the light emission rapidly decays. For simplicity, it will be assumed below that the time constant of the decay process is short enough that substantially no light is emitted during the addressing intervals.
The lengths of the sustaining periods (CF0 to CF7) are in the ratio 1:2:4:8:16:32:64:128. Combinations of these lengths provide a luminance scale or gray scale with two hundred fifty-six levels, from zero to two hundred fifty-five (1 +2 +4 +8 +16 +32 +64 +128 =255). A luminance level of one hundred twenty-seven, for example, is expressed by driving a pixel during the first seven subfields SF0 to SF6 (1 +2 +4 +8 +16 +32 +64 =127). Although the pixel flickers on and off seven times within the field AF, the flicker is too fast to be perceived; the human eye integrates the total on-time and reacts by seeing the desired luminance level.
Referring to FIG. 2, a conventional PDP display apparatus comprises an image signal input terminal 1, a synchronizing (sync) signal input terminal 2, an eight-bit analog-to-digital converter (ADC) 3, an inverse gamma corrector 4, a field memory unit 5, drive circuits 6, a control unit 7, and a plasma discharge panel 8. Descriptions of these elements will be given later.
The luminance resolution of this type of display can be increased by increasing the number of subfields. For example, ten subfields with sustaining periods in the ratio 1:2:4:8:16:32:64:128:256:512 provide one thousand twenty-four luminance levels. A problem, however, is that the length of the addressing intervals remains constant, so as more subfields are added, more time is needed for addressing, less time is available for firing the pixels, and the brightness of the display is correspondingly reduced.
A further problem is that all luminance levels are integer multiples of the lowest expressible luminance level, at which a pixel is driven only during the first subfield SF0. The human eye, however, is more sensitive to differences between low luminance levels than differences between high luminance levels, so a luminance resolution that is adequate for bright areas of an image may be inadequate for darker areas. When an image with continuous luminance variations is displayed on the conventional display, the variations occurring at low luminance levels tend to be perceived as discrete changes, creating unwanted contours in the image.
Solutions to these problems have been proposed, but the proposed solutions have various disadvantages.
An image displaying device described in Japanese Unexamined Patent Application No. 8-149398 adds a random signal to the image signal to disguise unwanted contours. This scheme does not actually improve the luminance resolution of the image, because the random signal is unrelated to the image signal.
A plasma display device described in Japanese Unexamined Patent Application No. 6-295161 varies the reference voltages used in analog-to-digital conversion in a predetermined pattern that varies from field to field. This scheme also disguises contours without actually increasing the luminance resolution of the image.
A DMD display system described in U.S. Pat. No. 5,726,718 uses an error diffusion filter to enhance perceived luminance resolution by propagating luminance error to nearby pixels. Error diffusion, however, has a known tendency to degrade spatial resolution, and to introduce image artifacts in certain situations.
It is accordingly an object of the present invention to improve the quality of a digital image by increasing the perceived luminance resolution.
The invented luminance resolution enhancement circuit receives an (m+n)-bit digital image signal having an m-bit displayable component and an n-bit non-displayable component, where m and n are positive integers. The luminance resolution enhancement circuit comprises address-generating means generating relative spatial and temporal coordinates that divide the image into coordinate regions and identify the relative position of each pixel within its coordinate region. For each pixel in the image, an averaging means calculates an average value representing the non-displayable component of the average luminance level in an averaging region including the pixel. A dithering means generates a dither signal according to the relative spatial and temporal coordinates of the pixel and the calculated average value. An arithmetic means additively combines the dither signal with the displayable component of the image signal, thereby generating an m-bit output image signal.
The dither signal simulates the non-displayable component of the image signal by generating a proportional number of 1""s within a dither region of a certain size. The dither region may extend in the temporal dimension, as well as in the spatial dimensions. The size of the averaging region can be selected independently of the size of the dither region, but in one aspect of the invention, the dither region and averaging region are identical, and both are identical to a unit region within which the same average value is calculated for all pixels. This aspect of the invention assures faithful simulation of the average luminance level within the unit region.
In another aspect of the invention, the unit region and averaging region are identical, but the dither region is larger. The size of the dither region may be enlarged to obtain increased luminance resolution. Alternatively, the size of the unit region and averaging region may be reduced to obtain increased spatial resolution.
In another aspect of the invention, the averaging region and unit region are restricted to pixels with luminance levels not differing by more than a predetermined threshold value. Increased sharpness is thereby obtained.
In another aspect of the invention, the dither signal is also responsive to an external signal. The external signal can be used to select different dither patterns for still and moving images.
In another aspect of the invention, the number of bits of simulated luminance resolution is varied according to the luminance level. For example, increasing numbers of most significant bits of the average signal can be used as the luminance level decreases.
The invention also provides a display apparatus using the invented luminance resolution enhancement circuit. The display apparatus may include an inverse gamma corrector that converts the image signal so as to provide additional luminance resolution at lower luminance levels, before the image signal is processed by the luminance resolution enhancement circuit.